dc.description.abstract | The classical digital design approach (i.e., manual synthesis and minimization of logic) quickly
becomes impractical as systems become more complex. This is the motivation for the modern digital
design flow, which uses hardware description languages (HDL) and computer-aided synthesis/minimization
to create the final circuitry. The purpose of this book is to provide a quick start guide to the VHDL
language, which is one of the two most common languages used to describe logic in the modern digital
design flow. This book is intended for anyone that has already learned the classical digital design
approach and is ready to begin learning HDL-based design. This book is also suitable for practicing
engineers that already know VHDL and need quick reference for syntax and examples of common
circuits. This book assumes that the reader already understands digital logic (i.e., binary numbers,
combinational and sequential logic design, finite state machines, memory, and binary arithmetic basics).
Since this book is designed to accommodate a designer that is new to VHDL, the language is
presented in a manner that builds foundational knowledge first before moving into more complex topics.
As such, Chaps. 1–5 only present functionality built into the VHDL standard package. Only after a
comprehensive explanation of the most commonly used packages from the IEEE library is presented in
Chap. 7, are examples presented that use data types from the widely adopted STD_LOGIC_1164
package. For a reader that is using the book as a reference guide, it may be more practical to pull
examples from Chaps. 7–12 as they use the types std_logic and std_logic_vector. For a VHDL novice,
understanding the history and fundamentals of the VHDL base release will help form a comprehensive
understanding of the language; thus it is recommended that the early chapters are covered in the
sequence they are written. | en_US |